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Abstract
In this paper, a new structure of III-V FET, gate all around FET is presented. Normally III-V FET is in ON state and operates in depletion mode with negative value of threshold voltage. The negative threshold voltage is due to higher inversion charge at the heterointerface due to polarization charges and discontinuity in the conduction band. The presented model in this work can successfully operate in enhancement mode and provides positive threshold voltage by reducing polarization charges at the heterointerface of AlGaN barrier and GaN buffer layer.