Design and Analysis of CCALBO - A Novel BIST Structure

Abstract

This paper proposes an original approach for BILBO-based BISTs architectures coined (Concurrent Built-In Logic Block Observer) CCALBO. This technique is a combined inspiration from the designs of CBILBO and CALBO. We give the detail of designing the CCALBO cell and its fault-masking probability with inclusion in a combination and sequential CUT i.e., Vedic Multiplier and multiply and Accumulate Unit. CCALBO-based BIST is then compared with the most competitive technique CBILBO-based BIST. We choose major parameters such as power, area, and delay with additional parameters such as functionality, fault coverage.